MYIR-ZYNQ7000系列-zturn教程(27)：lwip测试

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开发板环境：vivado 2017.4 ，开发板型号xc7z010clg400-1，这个工程主要是进行eth测试

链接：https://pan.baidu.com/s/1dUm68xhKjobq1C6st9Zn3A
提取码：o868

step1 新建一个vivado工程

step 2 导入zynq配置文件

点击Create Block Design

点击OK

调用zynq核

双击zynq核导入配置文件

选择Apply Configuration导入配置文件

选择MYIR.tcl文件，点击OK

点击OK

配置完成后，如下图所示

点击Run Block Automation 引出zynq管脚

点击OK

引出的管脚，如下图所示

step 3 综合

右击design_1-->Generate Output Products

点击Generate

step 4 生成顶层文件

右击design_1-->Create HDL Wrapper 生成顶层文件

点击OK

step 5 生成bit文件

点击工具栏上的Generate Bitstream图标生成bit文件

点击Yes

点击OK

生成完成后，点击Cancel

step 6 导出硬件配置并打开SDK

File--> Export-->Export Hardware 导出硬件配置

点击OK

点击File-->Launch SDK打开SDK

点击OK

step 7 新建eth_test工程

File-->Application Project

新建eth_test工程，点击Next

选择lwip模板，点击Finish

打开eth_test_bsp路径下的xemacpsif_physpeed.c文件（ksz9031需要改这里，其它的phy芯片有的新建lwip就可以直接用）

找到get_Marvell_phy_speed这个函数更改函数末尾读取phy速度部分

将函数末尾改为这样，点击保存

点击xaxiemacif_physpeed.c文件

然后将这段get_KSZ9031_phy_speed一整个程序段添加进去，点击保存

static u32_t get_KSZ9031_phy_speed(XAxiEthernet *xaxiemacp, u32_t phy_addr)
{u16_t temp;u16_t control;u16_t status;u16_t status_speed;u32_t timeout_counter = 0;u32_t temp_speed;xil_printf("Start PHY autonegotiation \r\n");XAxiEthernet_PhyWrite(xaxiemacp,phy_addr, IEEE_PAGE_ADDRESS_REGISTER, 2);XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_CONTROL_REG_MAC, &control);control |= IEEE_RGMII_TXRX_CLOCK_DELAYED_MASK;XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_CONTROL_REG_MAC, control);XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_PAGE_ADDRESS_REGISTER, 0);XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_AUTONEGO_ADVERTISE_REG, &control);control |= IEEE_ASYMMETRIC_PAUSE_MASK;control |= IEEE_PAUSE_MASK;control |= ADVERTISE_100;control |= ADVERTISE_10;XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_AUTONEGO_ADVERTISE_REG, control);XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,&control);control |= ADVERTISE_1000;XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,control);XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_PAGE_ADDRESS_REGISTER, 0);XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_COPPER_SPECIFIC_CONTROL_REG,&control);control |= (7 << 12);	/* max number of gigabit attempts */control |= (1 << 11);	/* enable downshift */XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_COPPER_SPECIFIC_CONTROL_REG,control);XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_CONTROL_REG_OFFSET, &control);control |= IEEE_CTRL_AUTONEGOTIATE_ENABLE;control |= IEEE_STAT_AUTONEGOTIATE_RESTART;XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_CONTROL_REG_OFFSET, control);XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_CONTROL_REG_OFFSET, &control);control |= IEEE_CTRL_RESET_MASK;XAxiEthernet_PhyWrite(xaxiemacp, phy_addr, IEEE_CONTROL_REG_OFFSET, control);while (1) {XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_CONTROL_REG_OFFSET, &control);if (control & IEEE_CTRL_RESET_MASK)continue;elsebreak;}XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_STATUS_REG_OFFSET, &status);xil_printf("Waiting for PHY to complete autonegotiation.\r\n");while ( !(status & IEEE_STAT_AUTONEGOTIATE_COMPLETE) ) {sleep(1);XAxiEthernet_PhyRead(xaxiemacp, phy_addr,IEEE_COPPER_SPECIFIC_STATUS_REG_2,  &temp);timeout_counter++;if (timeout_counter == 30) {xil_printf("Auto negotiation error \r\n");return XST_FAILURE;}XAxiEthernet_PhyRead(xaxiemacp, phy_addr, IEEE_STATUS_REG_OFFSET, &status);}xil_printf("autonegotiation complete \r\n");XAxiEthernet_PhyRead(xaxiemacp, phy_addr, 0x1f, &status_speed);if ( (status_speed & 0x0040) != 0)/* 1000Mbps */return 1000;else if ( (status_speed & 0x0020) != 0)/* 100Mbps */return 100;else					/* 10Mbps */return 10;/*XAxiEthernet_PhyRead(xaxiemacp, phy_addr,IEEE_SPECIFIC_STATUS_REG,&status_speed);if (status_speed & 0x400) {temp_speed = status_speed & IEEE_SPEED_MASK;if (temp_speed == IEEE_SPEED_1000)return 1000;else if(temp_speed == IEEE_SPEED_100)return 100;elsereturn 10;}*/return XST_SUCCESS;
}